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A remote role at Distro.
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Original listing text, shown exactly as published by the company.
Scan, ATPG, MBIST, LBIST
Timing Simulation, SDF, SDC
Pattern Retargeting / Porting
Diagnosis, DRCs
Tools: TetraMax, DFTMax
🔹 Experience
10+ years in ASIC DFT (hands-on)
Lead DFT architecture, implementation & sign-off
Drive scan insertion, scan chains & compression flows
Own MBIST/LBIST integration and debug
Perform silicon debug, failure analysis & root cause
Develop DFT constraints (SDC) & timing analysis
Support ATPG generation, simulation & coverage closure
Work on JTAG, boundary scan, iJTAG
Collaborate across RTL, PD, STA, validation teams
Mentor junior engineers
Develop automation scripts (TCL/Perl/Python)
Strong DFT fundamentals & fault models knowledge
Expertise in scan, ATPG, MBIST, JTAG, debug
Experience with Synopsys / Cadence / Siemens tools
Post-silicon validation experience
Large SoC & hierarchical DFT exposure
Tessent / SSN tools
Yield analysis & manufacturing test optimization
Multi-node ASIC experience
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Distro
YC S24Other
92 open roles on Sydicom
Distro is the all-in-one AI-powered sales platform for counter staff and inside sales at industrial wholesale distributors (HVAC/R, plumbing, electrical, and more).
Source: Y Combinator
