Staff/Principal Logical Design Engineer

Responsibilities and Duties

• Being part of the Logical Design team, producing high quality micro-architecture specification and RTL for Graphcore chips
• Ensuring good communication between different teams and across multiple sites
• Contributing to shared design infrastructure and flows
• Using EDA tools and the Graphcore design flow to design innovative technologies
• Contributing to block-level and chip-level checks and auditing (Linting, Synthesis, Timing Closure, CDC, RDC, Coverage)
• Working closely with Physical Design, Verification and DFT teams

Essential skills

• Degree in Computer Science, Engineering or a related subject
• Digital design experience in a relevant industry
• Be highly motivated, a self-starter, and a team player
• Ability to work across teams and finding solutions to problems
• Ability to solve design issues through programming, e.g. Python, Tcl
• Strong competency in SystemVerilog or VHDL
• Knowledge of digital design flows
• Capable of managing time and priorities

Desirable

• Processor design
• Application specific blocks
• High-speed serial interfaces
• Complex third-party IP integration
• Experience leading teams
• Arithmetic pipeline design
• Floating-point design
• Design for test
• Synthesis
• Timing Analysis
• Logical Equivalence
• Project Planning
• Power Integrity
• Silicon transistor knowledge